MPSoCS are gaining popularity because of its potential to solve computationally expensive applications. MPSoCS frequently use two kinds of memories; on-chip SRAMs and off-chip DRAMs. processor in multi-core systems usually take many clock cysles for the transfer of data to/from off-chip memories which affects the overall system performance. while on-chip memory operation takes one of two clock cycles, an off-chip memory access take significantly more number of clock cycles. memory access delay largely depend on the ways of memory allocation and array binding. in this paper, memory delay modelling for finding accurate delays and two effective techniques, memory allocation and slack time management, are proposed for memory access optimization off-chip DRAM's.