| DaftarIsitemplate |
| Call Number |
| 005.115 Fie |
| Title |
| Run-time performance optimization of an FPGA-based deduction engine for SAT solvers, (LNCS-Lecture Notes in Computer Science 2147) Hal 315-325 |
| Author |
| Andreas Dandalis; Viktor K. Prasanna; Bharani Thiruvengadam; |
| Publisher |
| Springer, 2001 |
| Subject |
| Location |