Typically, commercially available shared memory machines have addressed the cache cohenrence problem with hardware strategies based on global inter-chache communication. However, global communication limits scalability and efficiency. Local knowledge chorerence strategies, which avoid global communication at run-time, offer better scalability, at eh cost of some additional chache misses. The most effective local knowledge strategies described in the literature are those based on generation time stamps (TS). We propuse a new strategy, TSI, that reuires less extra storage thatn TS, only one extra bit percac line, and can produce mosre cache hits by exploiting sophisticated compiler analysis. TSI handles common synchonization paradigms including DOALL, DOACROSS and critical sections. Early resluts show TS1 is, worst case, slightly slower ahtn TS. Best case, TSI's flexibility allows for significant improvement.