A series of expriments has been conducted to show that efficiency improvement in galois field (GF) operators does not directly correspond to the system performance at applicaton level. the expriments were motivated by so many research works that focused on improving performance of GF operators. numerous variants of operators were formed based on various combination of operation ypes (multiplication, division, inverse square ), represntation basis (polyonomial, normal, dual), and processing types (serial, parallel). eachof the variants has the most efficient forms in either time (fastest) or space (smallest occupied area) when imlemented in an FPGA chip. in fact,GF operators are not utilized individually, rather integrated one to the others to implement algorithms, mostly in crypotography and error correction applications. the expriments based on the implementation of rijindeal cipher 128-bit using VHDL by means of two synthesis tools: the xilinx ISE 8.2i and the altium prochip designer nocludes that application performance mainly depends on the composition and distribution of the operators as well as their interaction and interconnection within the system architecture.