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The risc BLAS: a blocked implementation of level 3 BLAS for RISC processors
Author: Michael J.D. | Type: Indeks Artikel Jurnal
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Design and Implementation of 32-Bit RISC Microprocessor Core A Hypothetical Microprocessor on FPGA (270-276)
Author: Sarwono Sutikno Gede Indrawan; | Call Number: SEM-247 | Type: Indeks Artikel prosiding/Sem
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Architectural enhancements for montgomery multiplication on embedded RISC processors, (LNCS-Lecture Notes in Computer Science 2576) Hal 418-434
Author: Johann Grorschadl; Guy-armand Kamendje; | Call Number: 005.8 Zho a | Type: Indeks Artikel LNCS
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RISC microprocessors and scientific computing, Hal.645-654
Author: David H. Bailey; | Call Number: SEM-193 | Type: Indeks Artikel prosiding/Sem
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ARAS: asynchonous risc architecture simulator; Hal. 210- 219
Author: Chia-Hsing; Chien; Mark A. Franklin; Tienyo Pan; Prithvi Prabhu; | Call Number: SEM-234 | Type: Indeks Artikel prosiding/Sem
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MIPS RISC architecture/by Gerry kane and Joe Heinrich
Author: Kane, Gerry; | Call Number: 004.22 Kan m | Type: Buku
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Introduction to risc assembley language programing/John Waldron
Author: Waldron, John; | Call Number: 005.136 Wal i | Type: Buku
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PA-RISC to IA-64: transparent execution, no recompilation, page 47
Author: Cindy Zheng | Type: Indeks Artikel Jurnal
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Implementasi paralel dan waktu-nyata beberapa algoritma prapengolahan citra dengan multi-mikrokontroler RISC, hal: 24-34
Author: Eril Mozef | Call Number: JIKT-2-2-Oktober2002-24 | Type: UI-ana Indek Artikel
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A Computer architecture educational system based on a 32-bit RISC processor, 114-119
Author: D. Mandalidis; P. Kenterlis; J. N. Ellinas | Type: Indeks Artikel Jurnal
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