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Design of VLSI gate array ICS/Ernest E. Hollis
Author: Hollis, Ernest E.; | Call Number: 621.395 Hol d | Type: Buku
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VHDL for designers/Stefan Sjoholm
Author: Sjoholm, Stefan; | Call Number: 621.392 Sjo v | Type: Buku
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Extract the Input Parameters of the RET Phase Function Using Jansson Deconvolution Method (V1-585 -- V1-589)
Author: Huajian Cui Jurgen Richter Genfang Chen; | Call Number: SEM-334 | Type: Indeks Artikel prosiding/Sem
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Volume data mining using 3D field topology analysis, page 46
Author: Issei F. | Type: Indeks Artikel Jurnal
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VLSI testing: advanced memory testing algorithms and switch level memory model for srams, HAL. 264-268
Author: Indira Rawat; | Call Number: SEM-290 | Type: Indeks Artikel prosiding/Sem
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Designing with programmable array logic/ The technical staff of monolithic memories Inc.
Author: Technical staff of monolithic memories; | Call Number: 004.35 Tec d | Type: Buku
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Color Image Segmentation using Constrained Compound Markov Random Field Modal and Homotopy Continuation Method
Author: Sucheta Panda,P.K. Nanda; | Call Number: SEM-305 | Type: Indeks Artikel prosiding/Sem
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Foult tolerance principles and practice
Author: Anderson, T.; | Call Number: 004.2 And f | Type: Buku Pusat
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Design methodology for fault-tolerant systolic array architectures, Hal. II.267-iI.274
Author: M.O. Esomu; A.J. Al-Khaili; S. Hariri; | Call Number: SEM-155 | Type: Indeks Artikel prosiding/Sem
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Shell sistem pakar diagnosis-SIPTree, Hal. 144-148
Author: Ririn Dwi A.; Farid Wazdi; Dade Nurjanah; | Call Number: SEM-273 | Type: Indeks Artikel prosiding/Sem
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