Call Number | SEM-247 |
Collection Type | Indeks Artikel prosiding/Sem |
Title | Design and Implementation of 32-Bit RISC Microprocessor Core A Hypothetical Microprocessor on FPGA (270-276) |
Author | Sarwono Sutikno Gede Indrawan; |
Publisher | |
Subject | core, RISC, FPGA, VHDL, functional simulation, timing simulation, testbench |
Location |
Nomor Panggil | ID Koleksi | Status |
---|---|---|
SEM-247 | TERSEDIA |