A novel fully digital adaptive power-supply regulator (APR) based on improved pulse skip modulation (PSM) in 90 nm CMOS is proposed in this paper. pulse skip modulation is used for AVS regulator for the first time in 90 nm CMOS. the controller of the regulator includes a delayline, a slacktime detector, a finite-state machine (FSM) and a hybrid digital pulse width modulator (DPWM) which is used to produce a sequence of pulses whose duty cycle is alterable and frequency is fixed according to its stimulus. compared to adaptive power-supply regulator based on pulse width modulation (PWM), adaptive power-supply regulator based on improved PSM is more efficient under light loads. meanwhile, the structure of controller of the proposed adaptive power-supply regulator is very simple and can be realized by digital design methodology and process, which make the controller easy to be integrated into SoCs. the regulator is designed in 90 nm CMOS process, operating typically at 1.5 MHz. the post-simulation results show that the output voltage of the regulator is adjusted ranged from 0.7 V to 1.5 V to the varied frequency ranged from 62.5 MHz to 250 MHz of the digital load circuit, which can save power consumption effectively. the maximum ripple of the output voltage is about 20 mV. the layout size of the controller is only 160 um x 24 um which is very small.